Back!

If you’ve been wondering where I’ve been the last few months, the short answer is simply “here”:


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(also known as my school’s Electrical Engineering Building)

I was working on my Senior Design Project, which was to implement an out-of-order Alpha processor using the Verilog Hardware Description Language. Put simply, me and my 3 team members made a 200MHz processor with roughly the Pentium 4 architecture for our senior design project/thesis. The class is known as a trial-by-fire introduction to hardware description languages, and we came through with good grades (and the fastest clock period in the class).

Point is, I haven’t had a lot of free time to blog lately. 😛 Thankfully though, I’m on (my last undergrad) semester break and have some time to catch up on blogging, and email, job hunting, hacking, and life, so expect some useful posts soon!

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